Device for unwinding meter readings
Fig.1. Electrical schematic diagram
The device is designed to unwind indications of induction meters without changing their switching schemes. With regard to electronic and electronic-mechanical meters, the design of which is based on the inability to countdown readings, the device allows you to completely stop accounting to the level of the generator's reactive power. With the elements indicated in the diagram, the device is designed for a rated voltage of 220 V and a power of unwinding of approximately 2 kW. The use of other elements allows you to increase power accordingly. The device, assembled according to the proposed scheme, is simply inserted into the outlet, and the counter begins to count in the opposite direction. All electrical wiring remains intact. Grounding is not necessary.
Schematic diagram of the device
The schematic diagram is shown in Figure 1. The main elements of the device are the integrator, which is a resistive bridge R1-R4 and a capacitor C1, a pulse shaper (Zener diodes D1, D2 and resistors R5, R6), a logic node (elements DD1.1, DD2.1, DD2.2), a clock generator (DD2.3, DD2.4), an amplifier (T1, T2), an output stage (C2, T3, Br1) and a power supply unit on the transformer Tr1. The integrator is designed to extract signals from the mains voltage that synchronize the operation of the logical node. These are rectangular pulses of the TTL level at the inputs 1 and 2 of the DD1.1 element. The front of the signal at input 1 DD1.1 coincides with the beginning of the positive half-wave of the mains voltage, and the decay - with the beginning of the negative half-wave. The front of the signal at input 2 of DD1.1 coincides with the beginning of the positive half-wave of the integral of the mains voltage, and the decay coincides with the beginning of the negative half-wave. Thus, these signals are rectangular pulses synchronized by the network and shifted in phase relative to each other by the angle p / 2. The signal corresponding to the mains voltage is removed from the resistive divider R1, R3, is limited to the level of 5 V with the help of the resistor R5 and the zener diode D2, then through the galvanic decoupling on the optron OC1 to the logic node. Similarly, a signal is generated that corresponds to the integral of the network voltage. The integration process is provided by the processes of charge and discharge of the capacitor C1. The logical node is used to generate control signals for a powerful key transistor T3 of the output stage. The control algorithm is synchronized by the integrator output signals. Based on the analysis of these signals, at the output 4 of the element DD2.2 a signal is generated to control the output stage. At the required time points, the logical node modulates the output signal of the master oscillator signal, providing high-frequency power consumption. To provide a pulse process for charging the storage capacitor C2, a master oscillator is used on logic elements DD2.3 and DD2.4. It generates pulses with a frequency of 2 kHz with an amplitude of 5 V. The frequency of the signal at the output of the generator, and the duty cycle of the pulses are determined by the parameters of timing chains C3-R20 and C4-R21. These parameters can be adjusted during adjustment to ensure the greatest error in the metering of electricity consumed by the device. The output cascade control signal through galvanic isolation at the optocoupler OS3 is fed to the input of a two-stage amplifier on T1 and T2 transistors. The main purpose of this amplifier is full opening with input into the saturation mode of the T3 transistor of the output stage and its reliable locking at the moments of time determined by the logic node. Only the introduction of saturation and full closure will allow the T3 to operate in difficult conditions of the output stage. If you do not ensure reliable full opening and closing of the T3, and for the minimum time, it fails from overheating in a few seconds. The power supply is built according to the classical scheme. The need to use two power channels is dictated by the feature of the output stage mode. It is possible to ensure reliable opening of T3 only at a supply voltage of at least 12V, and a stable voltage of 5V is required to power the chips. In this case, the common wire can only be conditionally considered the negative pole of the 5-volt output. It must not be grounded or connected to the network wires. The main requirement for the power supply is the ability to provide a current of up to 2 A at the output of 36 V. This is necessary for the input of a powerful key transistor of the output stage to the saturation mode in the open state. Otherwise, it will dissipate more power, and it will fail.
Details and construction
Chips can be used any: 155, 133, 156 and other series. The use of microcircuits based on MOS - structures is not recommended, since they are more susceptible to interference from the operation of a powerful key cascade. The key transistor T3 must be installed on the radiator with an area of at least 200 cm2. For the T2 transistor, a radiator with an area of at least 50 cm2 is used. For safety reasons, the metal case of the device should not be used as radiators. The storage capacitor C2 can only be non-polar. The use of an electrolytic capacitor is not allowed. The capacitor must be rated for a voltage of at least 400V. Resistors: R1 - R4, R15 type MLT-2; R18, R19 - wire power not less than 10 W; other resistors such as MLT-0.25. Tr1 transformer - any power about 100 W with two separate secondary windings. The voltage of the winding 2 should be 24 - 26. V, the voltage of the winding 3 should be 4 - 5 V. The main requirement is that the winding 2 should be rated for a current of 2 - 3 A. The winding 3 is low-power, the current consumption from it will be no more than 50 mA. The device as a whole is collected in any case. It is very convenient (especially for the purpose of conspiracy) to use for this the case from a household voltage regulator, which in the recent past was widely used to power lamp TVs.
Be careful when setting up the circuit! Remember that not all the low-voltage part of the circuit is electrically isolated from the electrical network! It is not recommended to use the metal case of the device as a radiator for the output transistor. The use of fuses - a must! The storage capacitor works in the limiting mode, so before turning on the device it must be placed in a solid metal case. The use of an electrolytic (oxide) capacitor is not allowed! Low voltage power supply is checked separately from other modules. It must provide a current of at least 2 A at the output of 36 V, as well as 5 V to power the control system. The integrator is checked with a two-beam oscilloscope. To do this, the common wire of the oscilloscope is connected to the neutral wire of the electrical network (N), the wire of the first channel is connected to the connection point of resistors R1 and R3, and the wire of the second channel is connected to the connection point R2 and R4. Two sinusoids with a frequency of 50 Hz and an amplitude of about 150 V each, displaced from each other along the time axis by the angle p / 2 should be visible on the screen. Next, check for signals at the outputs of the limiters, connecting the oscilloscope in parallel with the Zener diodes D1 and D2. To do this, the common wire of the oscilloscope is connected to the point N of the network. The signals must have a regular rectangular shape, a frequency of 50 Hz, an amplitude of about 5 V, and must also be offset between each other by an angle p / 2 along the time axis. The increase and decrease of impulses within no more than 1 ms is allowed. If the phase shift of the signals is different from p / 2, then it is adjusted by selecting the capacitor C1. The steepness of the front and the decay of the pulses can be changed by selecting the resistance of resistors R5 and R6. These resistances should be at least 8 kOhm, otherwise the signal level limiters will affect the quality of the integration process, which ultimately will lead to an overload of the output stage transistor. Then adjust the generator, disconnecting the power part of the circuit from the mains. The generator should generate pulses with an amplitude of 5 V and a frequency of about 2 kHz. Duration of pulses is approximately 1/1. If necessary, select capacitors C3, C4 or resistors R20, R21 for this. The logical node does not require adjustment provided that it is correctly installed. It is desirable only to verify with an oscilloscope that at inputs 1 and 2 of the element DD1.1 there are periodic signals of a rectangular shape that are displaced relative to each other along the time axis by the angle p / 2. At output 4 of DD2.2, bursts of 2 kHz pulses should be formed periodically every 10 ms; the duration of each batch is 5 ms.
Setting the output stage is to set the base current of the transistor T3 at a level of at least 1.5 -2 A. It is necessary to saturate this transistor in the open state. For tuning, it is recommended to disconnect the output stage with the amplifier from the logic node (disconnect the resistor R22 from the output of the DD2.2 element), and control the cascade by applying +5 V to the disconnected contact of the resistor R22 directly from the power supply. Instead of the capacitor C1, the nA load in the form of a 100 W incandescent lamp is temporarily turned on. The base current T3 set selecting the resistance of the resistor R18. This may require further selection of the R13 and R15 amplifier. After the ignition of the optocoupler OS3, the base current of the transistor T3 should decrease to almost zero (a few μA). This setting provides the most favorable thermal mode of operation of a powerful key transistor of the output stage.
After setting all the elements, restore all the connections in the circuit and check the operation of the circuit assembly. The first inclusion is recommended to perform with a reduced capacitance value of the capacitor C2 to approximately 1 microfarad. After turning on the device, let it work for a few minutes, paying particular attention to the temperature conditions of the key transistor. If everything is in order - you can increase the capacitance of the capacitor C2. It is recommended to increase the capacity to the nominal value in several stages, each time checking the temperature conditions. The power of unwinding primarily depends on the capacitance of the capacitor C2. To increase the power you need a larger capacitor. The limiting value of the capacity is determined by the magnitude of the pulsed charge current. Its value can be judged by connecting an oscilloscope parallel to the resistor R19. For transistors KT848A it should not exceed 20 A. If you want to increase the power of the winding, you will have to use more powerful transistors, as well as Br1 diodes. But it is better to use another circuit with an output stage on four transistors. It is not recommended to use too much unwinding power. As a rule, 1 kW is enough. If the device works in conjunction with other consumers, the meter then deducts the device's power from their power, but the wiring will be loaded with reactive power. This should be taken into account in order not to damage the electrical wiring.