This page has been robot translated, sorry for typos if any. Original content here.

Device for unwinding the readings of electric meters

Fig. 1. Schematic diagram

The device is designed to rewind the readings of induction electric meters without changing their switching circuits. With regard to electronic and electronic-mechanical meters, the design of which is incapable of counting down the readings, the device allows you to completely stop the metering to the level of reactive power of the generator. With the elements indicated in the diagram, the device is designed for a rated voltage of 220 V and a winding power of approximately 2 kW. The use of other elements allows a corresponding increase in power. A device assembled according to the proposed scheme is simply inserted into the outlet, and the counter starts counting in the opposite direction. All wiring remains intact. Grounding is not necessary.

Schematic diagram of the device

The circuit diagram is shown in Fig. 1. The main elements of the device are an integrator, which is a resistive bridge R1-R4 and capacitor C1, a pulse shaper (Zener diodes D1, D2 and resistors R5, R6), a logical node (elements DD1.1, DD2.1, DD2.2), a clock (DD2.3, DD2.4), amplifier (T1, T2), output stage (C2, T3, Br1) and the power supply on the transformer Tr1. The integrator is designed to isolate signals from the mains voltage that synchronize the operation of the logical node. These are rectangular pulses of the TTL level at the inputs 1 and 2 of the DD1.1 element. The front of the signal at input 1 of DD1.1 coincides with the beginning of the positive half-wave of the mains voltage, and the decline with the beginning of the negative half-wave. The front of the signal at input 2 of DD1.1 coincides with the beginning of the positive half-wave of the mains voltage integral, and the decline coincides with the beginning of the negative half-wave. Thus, these signals are rectangular pulses synchronized by the network and phase-shifted relative to each other by an angle p / 2. The signal corresponding to the mains voltage is removed from the resistive divider R1, R3, limited to 5 V using a resistor R5 and a zener diode D2, then fed through a galvanic isolation on the optocoupler OS1 to a logical node. Similarly, a signal is generated corresponding to the integral of the mains voltage. The integration process is provided by the processes of charge and discharge of the capacitor C1. The logical node serves to generate control signals with a powerful key transistor T3 of the output stage. The control algorithm is synchronized by the integrator output signals. Based on the analysis of these signals, at the output 4 of the DD2.2 element, a control signal for the output stage is formed. At necessary times, the logical node modulates the output signal with a signal from the master oscillator, providing high-frequency power consumption. To ensure a pulsed charge process of the storage capacitor C2, a master oscillator based on the logic elements DD2.3 and DD2.4 is used. It generates pulses with a frequency of 2 kHz and an amplitude of 5 V. The frequency of the signal at the generator output, and the duty cycle of the pulses are determined by the parameters of the timing circuits C3-R20 and C4-R21. These parameters can be selected during configuration to ensure the greatest error in accounting for the electricity consumed by the device. The control signal of the output stage through galvanic isolation on the optocoupler OS3 is fed to the input of a two-stage amplifier on transistors T1 and T2. The main purpose of this amplifier is to fully open the output stage with the saturation mode of the transistor T3 and to securely lock it at time points determined by the logical node. Only saturation and complete closure will allow the T3 transistor to function in the harsh operating conditions of the output stage. If you do not provide reliable full opening and closing of the T3, and in a minimum time, then it fails from overheating for several seconds. The power supply is built according to the classical scheme. The need to use two power channels is dictated by the feature of the output stage mode. It is possible to ensure reliable opening of T3 only with a supply voltage of at least 12 V, and a stabilized voltage of 5 V is required to power the microcircuits. In this case, the negative pole of the 5-volt output can only conditionally be considered the common wire. It must not be grounded or connected to mains wires. The main requirement for the power supply is the ability to provide a current of up to 2 A at the output of 36 V. This is necessary to enter a powerful key transistor of the output stage into saturation mode in the open state. Otherwise, large power will be dissipated on it, and it will fail.

Parts and construction

Any microcircuit can be used: 155, 133, 156 and other series. The use of microcircuits based on MOS structures is not recommended, since they are more susceptible to interference from the operation of a powerful key stage. The key transistor T3 must be installed on a radiator with an area of ​​at least 200 cm2. For the transistor T2, a radiator with an area of ​​at least 50 cm2 is used. For safety reasons, the metal case of the device should not be used as radiators. The storage capacitor C2 can only be non-polar. The use of an electrolytic capacitor is not allowed. The capacitor must be rated for at least 400V. Resistors: R1 - R4, R15 type MLT-2; R18, R19 - wire power of at least 10 watts; other resistors type MLT-0.25. Transformer Tr1 - any power of about 100 watts with two separate secondary windings. The voltage of winding 2 should be 24 - 26. V, the voltage of winding 3 should be 4 - 5 V. The main requirement is that winding 2 should be designed for a current of 2 - 3 A. Winding 3 is low-power, the current consumption from it will be no more than 50 mA. The device as a whole is assembled in some kind of housing. It is very convenient (especially for conspiracy purposes) to use a housing from a household voltage stabilizer, which in the recent past was widely used to power tube TVs.


When setting up the circuit, be careful! Remember that not all low-voltage part of the circuit has galvanic isolation from the electric network! It is not recommended to use the metal case of the device as a radiator for the output transistor. The use of fuses is a must! The storage capacitor operates in extreme mode, therefore, before turning on the device, it must be placed in a strong metal case. The use of an electrolytic (oxide) capacitor is not allowed! The low voltage power supply is checked separately from other modules. It must provide a current of at least 2 A at the output of 36 V, as well as 5 V for powering the control system. The integrator is checked by a two-beam oscilloscope. For this, the common wire of the oscilloscope is connected to the neutral wire of the power supply network (N), the wire of the first channel is connected to the connection point of the resistors R1 and R3, and the wire of the second channel is connected to the connection point of R2 and R4. Two sine waves with a frequency of 50 Hz and an amplitude of about 150 V each, offset from each other along the time axis by an angle p / 2, should be visible on the screen. Next, check for the presence of signals at the outputs of the limiters by connecting an oscilloscope parallel to the Zener diodes D1 and D2. For this, the common wire of the oscilloscope is connected to point N of the network. The signals must have a regular rectangular shape, a frequency of 50 Hz, an amplitude of about 5 V and should also be offset by an angle p / 2 along the time axis. The rise and fall of pulses is allowed for no more than 1ms. If the phase shift of the signals differs from p / 2, then it is adjusted by selecting the capacitor C1. The steepness of the front and the decline of the pulses can be changed by selecting the resistance of the resistors R5 and R6. These resistances must be at least 8 kOhm, otherwise the signal level limiters will affect the quality of the integration process, which will ultimately lead to an overload of the output stage transistor. Then the generator is adjusted by disconnecting the power part of the circuit from the mains. The generator should generate pulses with an amplitude of 5 V and a frequency of about 2 kHz. Pulse duty cycle is approximately 1/1. If necessary, capacitors C3, C4 or resistors R20, R21 are selected for this. The logical node does not require setup if it is installed correctly. It is only advisable to verify with an oscilloscope that at the inputs 1 and 2 of the DD1.1 element there are periodic rectangular signals that are offset relative to each other along the time axis by an angle p / 2. At output 4 DD2.2, pulse packets of 2 kHz frequency should be periodically generated every 10 ms, the duration of each packet is 5 ms.
Setting the output stage consists in setting the base current of the transistor T3 at a level of at least 1.5 -2 A. This is necessary to saturate this transistor in the open state. To configure, it is recommended to disconnect the output stage with the amplifier from the logical node (disconnect the resistor R22 from the output of the DD2.2 element), and control the cascade by supplying +5 V to the disconnected contact of the resistor R22 directly from the power supply. Instead of the capacitor C1, the NA load is temporarily switched on in the form of a 100 W incandescent lamp. The base current T3 is set by selecting the resistance of the resistor R18. This may require the selection of an R13 and R15 amplifier. After ignition of the OS3 optocoupler, the base current of the T3 transistor should decrease to almost zero (several μA). This setting provides the most favorable thermal mode of operation of a powerful key transistor of the output stage.
After setting all the elements, all connections in the circuit are restored and the operation of the circuit is checked. The first inclusion is recommended to be performed with a reduced capacitance of the capacitor C2 to approximately 1 μF. After turning on the device, let it work for several minutes, paying particular attention to the temperature conditions of the key transistor. If everything is in order, you can increase the capacitance of capacitor C2. It is recommended to increase the capacity to the nominal value in several stages, each time checking the temperature regime. The winding power primarily depends on the capacitance of the capacitor C2. To increase power, a larger capacitor is needed. The limiting value of the capacitance is determined by the value of the pulsed charge current. Its value can be judged by connecting the oscilloscope parallel to the resistor R19. For KT848A transistors, it should not exceed 20 A. If you need to increase the unwinding power, you will have to use more powerful transistors, as well as Br1 diodes. But it’s better to use a different circuit with an output stage on four transistors. It is not recommended to use too much unwinding power. Typically, 1 kW is enough. If the device works in conjunction with other consumers, the meter subtracts the device’s power from their power, but the wiring is loaded with reactive power. This must be taken into account so as not to damage the wiring.