The development of technology LVDS signal transmission

The volume of data transmitted - Gigabit consumption - milliwatts

Introduction

Standard transmission of differential low-voltage signal (LVDS) is today the best solution for systems with high-speed interfaces of low consumption. If you are using LVDS high-speed exchange is achieved with low power consumption. Additional advantages are compatible with low power supply voltage, low noise and reliable signal transmission. For these reasons, this standard is widely used in the production, in different market segments that require speed and low power consumption. Typical examples of application of this standard are those of boards and cables in the wiring switches, routers, industrial cameras, as well as in automobile engines and systems развлекательноинформационных driving. Even with all these advantages, there are some limitations for use in applications requiring support for multiple transceivers on one bus, bus-powered with low voltage and receiver with extended common mode range. This led to the emergence of new standards LVDS, supplementing the original standard.

Standard transmission of differential low-voltage signal (LVDS)

In 1994, National Semiconductor introduced the first technology transfer of low-voltage differential signaling (LVDS) interface as standard. Requirements for bandwidth grew exponentially, and system developers are looking for ways to reduce power losses. The usual standards such as RS-422 and RS-485, did not have enough speed, while the ECL (emitter-emitter coupled logic) and CML (logic circuits with a switch current) have sufficient data rates, but consume too much electricity. LVDS technology has helped solve this problem without any compromises. This differential technique, that is, it uses two lines for signal transmission (Fig. 1). In addition, the use of LVDS signal is transmitted from the current loop, and the logic level (high or low) is determined by the direction of current in the loop (clockwise or counterclockwise). Approximately 3.5 mA is only one wire pair, and returns to another. At the termination resistor creates a voltage (about ± 3,5 mA x 100 ohms = ± 350 mV). The receiver, a differential comparator determines the polarity of the voltage drop, with a positive voltage corresponds to the logic high level, a negative value - low. The driver provides 350 mV differential voltage at the output with the center at about 1.25 V. The threshold detector set at 100 mV with an input range of 0 to 2.4 V. This allows the nominal active signal to shift up or down to 1 in common mode due to the difference in ground potential. The driver is designed for use with a load of 100 ohms, with a terminating resistor of 100 Ohm.

Figure 1. A simplified diagram of the driver and receiver, LVDS, connected through a medium with a differential impedance of 100 ohms

Differential concept leads to a high gain in the form of common mode rejection. Due to its high resistance to noise of the signal can be reduced to just a few hundred millivolts. The smaller amplitude allows to exchange data more quickly, since the signal rise and fall well controlled and kept within the 1 V / ns. The relatively small constant current output reduces background noise and the noise power. Since the current in the transmitting pair is closely related to current loop, the electric fields scattering often disappear, reducing the electromagnetic interference. The rate of exchange varies depending on each individual device, but in any case, it is within the 1.5 Gb / s with a constant current. Power is minimized in three ways. The load current is limited to 3.5 mA, a current mode driver typically limits the dynamic power dissipation, and the quiescent current is reduced to a minimum with CMOS processes at the submicron level. The transfer of low-voltage differential signaling (LVDS) is defined in the standard ANSI/TIA/EIA-644-A-2001, which is an update to the standard ANSI/TIA/EIA-644 1995. This standard specifies a level of electrical signals LVDS, ie the output characteristics of the driver and receiver input. This standard should be used in conjunction with other standards that define a complete interface, including the protocol, and supports connection. This standards such as Camera Link interface, or standard FPD for laptops, some SPWG (Working Group of standard console), it is also used in many special applications. In addition, there are other standards. In Fig. Figure 2 shows the signal amplitude and offset voltage (respectively) of different standards LVDS.

Figure 2. Fluctuations of differential signals and a comparison of the displacement

To date, LVDS-set crystals and crystals with lots of features offered by several companies. In addition to simple linear drivers and receivers, engaged in conversion between levels of LVDS and LVTTL, there are buffers LVDS-LVDS, coordinate switches, distributors signals (splitters), and clock distribution device.

Of particular interest are the sets of crystals to convert from parallel to serial form and vice versa (SerDes), because they increase the speed LVDS, which gives a great advantage the whole system. LVDS technology allows for the integration of input-output with additional circuitry, such as: circuit PLL (Scheme PLL) to convert from parallel to serial form, with the registromzaschelkoy and even digital circuits, such as a test port of the peripheral auto-switched network channels (Boundary SCAN Test Access Port). In Fig. 3 shows an example of such a set of crystals SerDes. The converter of the parallel to serial form SCAN92LV1025 collects 10 slow input signals from TTL circuits and converts them into a coherent form one high-speed channel LVDS.

Figure 3. Crystal LVDS converter from parallel to serial form / converter from serial to parallel form with the added JTAG test

Clock signal of the transmitter plugs into a serial stream of data by marking the starting data (HIGH) and stop (LOW) bits. Narrow LVDS interface does not require the use of multiple contacts, heavy bulky connectors and cables, which in turn reduces the cost of the system. The transmitter of the serial to parallel form SCAN92LV1226 receives the signal LVDS, extracts the clock signal from the data stream and creates a 10-bit TTL bus. The capacity of the crystal can be up to 800 Mbit / s of useful information. Such technical solutions SerDes are ideal for those systems where we have to use thin wires, such as vision sensors connect to the truck chassis, cranes, a connection to the measuring head in the automatic test equipment, etc. There are some limitations LVDS, such as the level of common-mode voltage ± 1 V and the ultimate load of 100 ohms. This has resulted in the emergence of several variations of ^a standard LVDS.

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¹⁾ For example:

1. Standard ANSI/TIA/EIA-644 LVDS.
2. Standard ANSI/TIA/EIA-644-A LVDS.
3. Standard ANSI/TIA/EIA-899 M-LVDS.
4. Specification JEDEC GLVDS, version 1.0.
5. JEDEC SLVS (JESD8-13) in October 2001.

Bus topology

The first LVDS is used in special high-speed connections, "point to point." Driver must be harmonized with the line, and connection options must be selected on the basis of the characteristic input impedance of the cable. This achieves a high quality signal transmission, and its reflected light is minimized. To explain the difference between the options of implementing technology LVDS, is necessary to recall the basic configuration of tires, different designs are shown in Fig. 4. The simplest is a one-way bus with two points at the end of the cable, which has only one termination resistor and the driver is always on the opposite end of the cable. Due to the high noise immunity, the configuration of "point-point" supports high speed data exchange. Such a structure makes it easy to create a tire gigabit network. At the same time for bi-directional data transfer is necessary to allocate a separate line (2 pairs). In this case it may be a temporary transfer of data in two directions, and the common bus bandwidth is doubled.

Figure 4. Various bus topology

Another common configuration is the classical distribution system or multi-point bus. Using this configuration is particularly useful when you want to convey the same information in several points at once. As in the previous case, the driver is located at one end of the bus, and the terminating resistor - on the other. Along the bus there are two or more receivers with small connecting wires. The electrical length of these wires should be as small as possible to prevent the decrease in signal quality due to the effect of reflection, interference, etc. The rate of exchange when using multipoint bus can be up to 400-600 Mb / s depending on the connecting wires and the load. The most flexible configuration is a multi-point bus matching on both ends of the connecting wires. The driver can be anywhere in the bus. The work of several drivers at the same time is impossible, so the data transfer is half-duplex two-sided nature. Attaching nodes to the bus can be critical, so it should make carefully. For systems with two terminating resistors, the so-called multi-point systems require more powerful drivers for creating vibrations similar to LVDS, while the load range from 30 to 50 ohms.

Derivatives of LVDS

The table lists the main parameters of some types of LVDS.

Table 1. Comparative Table of LVDS

Parameter	LVDS	BLVDS	M-LVDS	GLVDS	LVDM
The amplitude of the output	250 - 450 mV	240 - 500 mV	480 - 650 mV	150 - 500 mV	247 - 454 mV
Bias voltage	1.125 In	1.3 V	0.3 - 2.1 V	75 - 250 mV	1.125 In
Completion	100 W	27 - 50 W	50 W	Internal to RX	50 W
Excitation current	2.5 - 4.5 mA	9 - 17 mA	9 - 13 mA	Regulated	6 mA
Short-circuit current	<24 mA	<65 mA	<43 mA	-	-10 MA
Thresholds	± 100 mV	± 100 mV	± 50 mV	± 100 mV	± 100 mV
Input voltage	In the 0 to +2,4	In the 0 to +2,4	-1,4 To +3,8 In	-0,5 To +1 in	In the 0 to +2,4
Common mode	± 1 V	± 1 V	± 2 V	± 0,5 V	± 1 V

Bus LVDS

In 1997 National Semiconductor introduced the LVDS bus to control the boards with a high load and low input impedance. Boards with a large number of cards (20 pieces) in a small space usually have an input impedance of 50-60 ohms. In agreeing on both ends in the amount of, for example, 54 ohm driver is actually confronted with a load of 27 ohms. To obtain the amplitudes of LVDS driver output current must be increased to three times the range of 10-12 mA. Another improvement of this technology was matching the output impedance driver, as well as technology to prevent the simultaneous use of a single channel. If multiple drivers trying to access the bus simultaneously, the output current will be reduced so as not to damage the input and output devices.

M-LVDS

A newer version of LVDS - Standard ANSI/TIA/EIA-899, known as M-LVDS (Multipoint-LVDS - Multipoint LVDS). This version supports multi-drop bus with double matching and can use up to 32 knots. M-LVDS is also expanding the range of common-mode regime up to ± 2 V. The maximum data rate 500 Mbit / s. In practice, the limited speed of 300-400 Mbit / s, depending on various parameters such as length of the connecting wires and the required signal quality. M-LVDS has an output current of 9-13 mA and turns to the cable and connections to the motherboard. When using long cables, the likelihood of a large difference between the potentials of the earth increases. Thus, the standard M-LVDS twice expanded the range of common mode LVDS up to ± 2 V for greater stability. M-LVDS also distinguishes two types of detectors (Fig. 5). Type 1, referred to as "data receiver" has the thresholds of ± 50 mV with a conventional hysteresis of 30 mV. Type 2 or "control unit" switches the output to LOW when the input voltage falls below 50 mV. The output is switched to HIGH at input voltages above 150 mV. The advantage of the shift of the threshold region is the appearance of 50 mV 50 mV noise margin.

Figure 5. Receiver M-LVDS type 1 and type 2

The outputs in this case the switch in position LOW (failsafe mode). By the way, M-LVDS has been selected PICMG (PCI group of computer manufacturing industry) as the standard for the transmission of signals in the clock distribution systems ATCAsovmestimyh data (ATCA - modern architecture computers for telecommunications).

GLVDS

GLVDS (correlated with the land LVDS) - development of one of the largest telecommunications companies. The technology is similar to GLDVS LVDS, except that the offset voltage output driver closer to the earth potential. By lowering the bias voltage inputs and outputs can be integrated into GLVDS specialized IP and work from sources with low voltage of 0.5 V. We GLVDS considered by the Committee JEDEC standards for adoption as a standard. JEDEC has published a standard that has many similarities with GLVDS. It is a standard SLVS, which stands for "variable signaling a low voltage of 400 mV" (JESD8-13). This interface is consistent with the potential of land and has two options for drivers and receivers. Receivers may be unilateral and differential, and the drivers - both for the applications' point to point "as well as for multipoint applications. The rate of exchange varies in the range 1-3 Gbit / s, but only over short distances (less than 30 cm). Therefore the use of this interface is limited to a region of high-speed connections from crystal to crystal. Due to the amplitude of 400 mV and coordination on the ground, the voltage supply rail is only 0.8 V. Thus, this interface is compatible with the nuclei of the low voltage used in ultrathin crystals of specialized IP.

LVDM

Company Texas Instruments has developed a series of components designed for applications with a double alignment of 100 ohms. The output current of the driver is twice as high a standard for LVDS, that is 6 mA nominal. Thus, when a 50 Ohm load levels are reached LVDS. This technology can be used with bi-directional tires "point-point" or multipoint buses with a small load.

Output

Standard LVDS provides developers with an opportunity not to sacrifice the essential characteristics of the system. Using this standard, data is transmitted at high speed, consumes little power, the system is resistant to noise and creates little interference. New types of LVDS best complement the original standard and allow you to use it in an even larger number of application systems. In the near future, the data rate will rise and voltage drop. With lower energy consumption, reduce electromagnetic interference and cross downward trend in the amplitudes, which marked the beginning of the creation of LVDS, is likely to continue in subsequent years.

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